| 摘要 |
The present invention provides a microcomputer architecture for executing an application. The microcomputer architecture comprises a plurality of functional units (26, 27), optionally register files (29, 35), and memories (34, 36) arranged so as to form a coarse grain array (22), and at least one processing unit (40, 41) supporting multiple threads of control. The at least one processing unit (40, 41) is adapted for allowing each thread of control to claim one or more of the functional units to work for that thread depending on requirements of the application, e.g. workload, and/or the environment, e.g. current usage of FU's. This way, the present invention provides multithreading with dynamic allocation of CGA resources. Based on the demand of the application and the current utilization of the CGRA, different resource combinations can be claimed. |
