摘要 |
A DLL system that automatically resets after a frequency change of an external clock according to a phase difference includes: a clock receiver for receiving the external clock and generating a clock signal; a delay line, coupled to the clock receiver, for generating a delayed clock signal; a control loop, for tracking a phase difference between the clock signal and the delayed clock signal and locking the delay line when the phase difference is zero; and an N degrees phase detector (PD), coupled to the control loop, for detecting the phase difference between the clock signal and the delayed clock signal and outputting a positive signal when the detected phase difference is greater than N degrees, wherein the positive signal generates a reset signal to the DLL system. |