发明名称 THREE-DIMENSIONAL INTEGRATED CIRCUIT LAMINATE
摘要 <P>PROBLEM TO BE SOLVED: To provide a three-dimensional integrated circuit laminate which is filled with an interlaminar filler composition having both of high heat conductivity and low liner expansion. <P>SOLUTION: A three-dimensional integrated circuit laminate comprises: a semiconductor substrate laminate 1 formed by stacking at least two or more layers of semiconductor substrates 10, 20, and 30 in which a semiconductor device layers 11, 21, and 31 are formed thereon; and first interlaminar filler layers 40 and 50 containing a resin (A) and an inorganic filler (B) and having linear expansion coefficient of 5 ppm or higher and 70 ppm or lower between the semiconductor substrates 10, 20, and 30. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012216837(A) 申请公布日期 2012.11.08
申请号 JP20120082480 申请日期 2012.03.30
申请人 MITSUBISHI CHEMICALS CORP 发明人 KAWASE YASUHIRO;IKEMOTO SHIN
分类号 H01L25/065;H01L23/36;H01L25/07;H01L25/18 主分类号 H01L25/065
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