发明名称 |
SIGNAL DELAY CIRCUIT, CLOCK TRANSFER CONTROL CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME |
摘要 |
A signal delay circuit including a clock transfer control circuit configured to transmit or block a clock signal, and a pulse signal generation circuit configured to delay a first pulse signal in response to the transmitted clock signal to generate a second pulse signal which has a longer active period than the first pulse signal. |
申请公布号 |
US2012280737(A1) |
申请公布日期 |
2012.11.08 |
申请号 |
US201213552037 |
申请日期 |
2012.07.18 |
申请人 |
NA HYOUNG-JUN;KIM KYUNG-WHAN |
发明人 |
NA HYOUNG-JUN;KIM KYUNG-WHAN |
分类号 |
H03K3/86 |
主分类号 |
H03K3/86 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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