发明名称 THREE-DIMENSIONAL INTEGRATED CIRCUIT LAMINATE
摘要 <P>PROBLEM TO BE SOLVED: To provide a three-dimensional integrated circuit laminate which is filled with an interlaminar filler composition having high heat conductivity in a semiconductor substrate laminate such as a Si substrate in which a semiconductor device layer is formed thereon. <P>SOLUTION: A three-dimensional integrated circuit laminate comprises: a semiconductor substrate laminate formed by stacking at least two or more layers of semiconductor substrates in which a semiconductor device layer is formed thereon; and a first interlaminar filler layer containing a resin (A) and an inorganic filler (B) having average grain size of 0.1 &mu;m or higher and 5 &mu;m or lower, maximum grain size of 10 &mu;m or lower, and heat conductivity of 2 W/mK or higher between the semiconductor substrates. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012216838(A) 申请公布日期 2012.11.08
申请号 JP20120082481 申请日期 2012.03.30
申请人 MITSUBISHI CHEMICALS CORP 发明人 IKEMOTO SHIN;KAWASE YASUHIRO
分类号 H01L25/065;H01L23/29;H01L23/31;H01L25/07;H01L25/18 主分类号 H01L25/065
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