| 摘要 |
According to one embodiment of the present disclosure, a focal plane array is provided. The focal plane array may comprise a plurality of pixels. Each pixel may include one or more capacitors operable to collect charge corresponding to an amount of light received at the respective pixel. Each pixel may further include a present state register operable to store a present state value of the respective pixel. The present state value indicates an amount of charge collected by the one or more capacitors of the respective pixel. The focal plane array may further include a logic circuit coupled to each present state register of the plurality of pixels. The logic circuit is operable to compute a next state value of each pixel based on the present state value of the respective pixel. The logic circuit may be time shared by the pixels.
|
