Multi-stage decoding circuit and method for concatenated codes with Inner TCM and Outer multi-stage RS Concatenated code, error correct circuit using the same for flash memory, and flash memory device using the same

摘要

PURPOSE: A multilayer decoding circuit of a multi-dimensional trellis-RS concatenated code, a method thereof, an error correcting circuit for a flash memory device using the same, and the flash memory device are provided to improve error correction capability by preventing the transition of an error through multilayer decoding. CONSTITUTION: A first stage decoding unit(210) receives a part of trellis-RS(Reed-Solomon) concatenated code and outputs a first output data by successively performing a multidimensional demodulation, viterbi decoding, and RS decoding. A second stage decoding unit(230) output a second output data by RS-decoding after the remaining trellis-RS concatenated code is multi-dimensionally demodulated through the first output data. [Reference numerals] (200) Flash memory core; (210) First stage decoding unit; (211) First multi-directional demodulator; (213) Viterbi decider; (215) First RS decoder; (230) Second stage decoding unit; (231) Second multi-dimensional demodulator; (233) Second RS decoder