发明名称 MULTILAYER INTERCONNECT STRUCTURE AND METHOD FOR INTEGRATED CIRCUITS
摘要 PURPOSE: A multilayer interconnection structure and method for integrated circuits are provided to form a multilayer interconnection structure by providing a substrate having thereon a first dielectric for supporting a multilayer interconnection. CONSTITUTION: A substrate having thereon an N-th dielectric is provided. A multilayer interconnection has a lower conductor(22,23), an upper conductor(34) and a connecting via. The lower conductor is formed on the substrate. The upper surface of the lower conductor is recessed below the upper surface of the N-th dielectric. An (N+1)-th dielectric is provided to the upper surface of the lower conductor and the N-th dielectric. The upper surface of the lower conductor is exposed by etching an (N+1)-th cavity. The (N+1)-th cavity is filled with an electrical conductor. The upper conductor and the connecting via are electrically contacted with the upper surface of the lower conductor. [Reference numerals] (AA) Understructure
申请公布号 KR20120122976(A) 申请公布日期 2012.11.07
申请号 KR20120044918 申请日期 2012.04.27
申请人 发明人
分类号 H01L21/28;H01L21/768 主分类号 H01L21/28
代理机构 代理人
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