| 摘要 |
<p>A FET includes a trench in a semiconductor region. The trench has a lower portion with a shield electrode therein, and an upper portion with a gate electrode therein, where the upper portion is wider than the lower portion. The semiconductor region includes a substrate of a first conductivity type and a first silicon region of a second conductivity type over the substrate. The first silicon region has a first portion extending to a depth intermediate top and bottom surfaces of the gate electrode. The first silicon region has a second portion extending to a depth intermediate top and bottom surfaces of the shield electrode. The semiconductor region further includes a second silicon region of the first conductivity type between the lower trench portion and the second portion of the first silicon region that has a laterally-graded doping concentration decreasing in a direction away from the sidewalls of the lower trench portion.</p> |
