| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to improve sensing margin by using a silicon oxide layer with lower dielectric constant than a silicon nitride layer for a bit line spacer. CONSTITUTION: A landing plug(16A) composed of a metal layer is formed on a substrate(11). An interlayer dielectric layer is formed on the substrate. A conductive layer is formed in contact with the landing plug via the interlayer dielectric layer. A damascene pattern is formed by selectively etching the interlayer dielectric layer and the conductive layer and a storage node contact plug is formed at the same time.
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