发明名称 Interface apparatus, calculation processing apparatus, interface generation apparatus, and circuit generation apparatus
摘要 There is provided is an interface apparatus including: a stream converter receiving write-addresses and write-data, storing the received data in a buffer, and sorting the stored write-data in the order of the write-addresses to output the write-data as stream-data; a cache memory storing received stream-data if a load-signal indicates that the stream-data are necessarily loaded and outputting data stored in a storage device corresponding to an input cache-address as cache-data; a controller determining whether or not data allocated with a read-address have already been loaded, outputting the load-signal instructing the loading on the cache memory if not loaded, and outputting a load-address indicating a load-completed-address of the cache memory; and at least one address converter calculating which one of the storage devices the allocated data are stored in, by using the load-address, outputting the calculated value as the cache-address to the cache memory, and outputting the cache-data as read-data.
申请公布号 US8307160(B2) 申请公布日期 2012.11.06
申请号 US20100694556 申请日期 2010.01.27
申请人 KAZAMA HIDEKI;SONY CORPORATION 发明人 KAZAMA HIDEKI
分类号 G06F12/00 主分类号 G06F12/00
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