发明名称 Receiving circuit
摘要 A receiving circuit in accordance with an exemplary aspect of the present invention includes a first voltage-dividing circuit that outputs a first input signal obtained by voltage division of one of differential signals based on the resistance ratio between first and second resistors, a second voltage-dividing circuit that outputs a second input signal obtained by voltage division of the other of the differential signals based on the resistance ratio between third and fourth resistors, a differential amplifier that amplifies the differential component between the first and second input signals, a common-mode voltage detection circuit that detects the common-mode voltage of the differential signals, and a bias voltage switching circuit that switches the voltage value of a bias voltage based on the common-mode voltage.
申请公布号 US8305145(B2) 申请公布日期 2012.11.06
申请号 US20110929290 申请日期 2011.01.12
申请人 NAKAMURA WATARU;RENESAS ELECTRONICS CORPORATION 发明人 NAKAMURA WATARU
分类号 H03F3/45 主分类号 H03F3/45
代理机构 代理人
主权项
地址