发明名称 Data output circuit of semiconductor memory device
摘要 A data output circuit of a semiconductor memory device includes a pipe latch unit configured to store input parallel data and align the stored data in response to a plurality of alignment control signals to output serial output data, and an alignment control signal generating unit configured to generate the plurality of alignment control signals in response to a burst-type information and a seed address group, wherein the alignment control signal generating unit generates the alignment control signals to swap data in a swap mode where the burst-type is a certain type and bits of the seed address group are certain values.
申请公布号 US8305819(B2) 申请公布日期 2012.11.06
申请号 US20100751425 申请日期 2010.03.31
申请人 KIM KWANG-HYUN;LEE KANG-YOUL;HYNIX SEMICONDUCTOR INC. 发明人 KIM KWANG-HYUN;LEE KANG-YOUL
分类号 G11C7/10 主分类号 G11C7/10
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