发明名称 Semiconductor memory with memory cell portions having different access speeds
摘要 A semiconductor memory including a plurality of memory banks disposed on an integrated circuit, each memory bank including an array of memory cells, wherein a first portion of memory cells of the plurality of memory banks has a first access speed and a second portion of memory cells of the plurality of memory banks has a second access speed, wherein the first access speed is different from the second access speed.
申请公布号 US8305834(B2) 申请公布日期 2012.11.06
申请号 US20100710800 申请日期 2010.02.23
申请人 RICHTER MICHAEL;BALB MARKUS;BILGER CHRISTOPH;BROX MARTIN;GREGORIUS PETER;HEIN THOMAS;SCHNEIDER ANDREAS;QIMONDA AG 发明人 RICHTER MICHAEL;BALB MARKUS;BILGER CHRISTOPH;BROX MARTIN;GREGORIUS PETER;HEIN THOMAS;SCHNEIDER ANDREAS
分类号 G11C8/00 主分类号 G11C8/00
代理机构 代理人
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