| 摘要 |
The disclosed embodiments relate to an apparatus and method for decoding signals in a receiver, such as signals using low density parity check error correction. The apparatus includes a link circuit. The link circuit may include a first memory, a first and second processing block, and also include a first shift circuit for shifting data before entering one of the processing blocks and a second shift circuit for reversing the first shift after exiting the processing block. The link circuit may also include a second memory used for intermediate storage and shared by the first and second processing block. The method includes reading data from a memory, shifting the data prior to processing, processing the data, and then reverse shifting the data prior to writing it back to the memory. |
