发明名称 THROUGH SILICON VIA PROCESSING TECHNIQUES FOR LATERAL DOUBLE-DIFFUSED MOSFETS
摘要 The present invention features a field effect transistor forming on a semiconductor substrate having formed thereon gate, source and drain regions, with said gate region having a lateral gate channel. A plurality of spaced-apart trenches each having an electrically conductive plug formed therein in electrical communication with said gate, source and drain regions, with said trenches extend from a back surface of said semiconductor substrate to a controlled depth. A trench contact shorts the source region and a body region. A source contact is in electrical communication with said source region and a drain contact in electrical communication with said drain region, with said source and drain contacts being disposed on opposite sides of said gate channel.
申请公布号 US2012273878(A1) 申请公布日期 2012.11.01
申请号 US201113095539 申请日期 2011.04.27
申请人 MALLIKARJUNASWAMY SHEKAR;ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED 发明人 MALLIKARJUNASWAMY SHEKAR
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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