发明名称 SEMICONDUCTOR APPARATUS WITH MULTIPLE TIERS, AND METHODS
摘要 Apparatus and methods are disclosed, including an apparatus that includes a number of tiers of a first semiconductor material, each tier including at least one access line of at least one memory cell and at least one source, channel and/or drain of at least one peripheral transistor, such as one used in an access line decoder circuit or a data line multiplexing circuit. The apparatus can also include a number of pillars of a second semiconductor material extending through the tiers of the first semiconductor material, each pillar including either a source, channel and/or drain of at least one of the memory cells, or a gate of at least one of the peripheral transistors. Methods of forming such apparatus are also described, along with other embodiments.
申请公布号 US2012273862(A1) 申请公布日期 2012.11.01
申请号 US201113096822 申请日期 2011.04.28
申请人 TANZAWA TORU;MICRON TECHNOLOGY, INC. 发明人 TANZAWA TORU
分类号 H01L27/108;H01L21/8242 主分类号 H01L27/108
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