发明名称 MECHANISM FOR DETECTING A NO-PROCESSOR SWAP CONDITION AND MODIFICATION OF HIGH SPEED BUS CALIBRATION DURING BOOT
摘要 <p>Memory channel training parameters are function of electrical characteristics of memory devices, processor(s) and memory channel(s). Training steps can be skipped if the BIOS can determine that the memory devices, motherboard and processor have not changed since the last boot. Memory devices contain a serial number for tracking purposes and most motherboards contain a serial number. Many processors do not provide a mechanism by which the BIOS can track the processor. Described herein are techniques that allow the BIOS to track a processor and detect a swap without violating privacy/security requirements.</p>
申请公布号 EP2517112(A2) 申请公布日期 2012.10.31
申请号 EP20100842409 申请日期 2010.11.04
申请人 INTEL CORPORATION 发明人 NATU, MAHESH, S.;LOVELACE, JOHN, V.;BANGINWAR, RAJESH, P.
分类号 G06F21/57;G06F21/44;G06F21/71;G06F21/73;G06F21/74;G06F21/85 主分类号 G06F21/57
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