发明名称 LATENCY CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME AND LATENCY CONTROL METHOD
摘要 PURPOSE: A latency control circuit, a semiconductor memory device including the same, and a latency control method are provided to generate a latency signal at accurate timing by controlling a latency delay amount. CONSTITUTION: A phase sensing unit(401) generates phase information by sensing whether a phase difference between an external clock and an internal clock is within a preset value. The external clock and the internal clock have the same clock cycle. A delay amount determining unit(403) determines latency delay amount using path information, a latency value, and phase information of an input signal. A latency delay unit(405) generates a latency signal by delaying the input signal with the delay amount corresponding to latency delay amount and the phase information and synchronizing with the internal clock. [Reference numerals] (401) Phase sensing unit; (403) Delay amount determining unit; (405) Latency delay unit
申请公布号 KR20120119441(A) 申请公布日期 2012.10.31
申请号 KR20110037366 申请日期 2011.04.21
申请人 SK HYNIX INC. 发明人 PARK, MIN SU;KIM, JAE IL
分类号 G11C7/22;G11C7/10 主分类号 G11C7/22
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