发明名称 NAND flash memory
摘要 A NAND flash memory, in a read operation, a p-type semiconductor substrate is set at a ground potential, a bit line is charged to a first voltage, a source line, a n-type well and a p-type well are charged to a second voltage, which lies between a ground potential and a first voltage, and in a block not selected by said row decoder, said drain-side select gate line and said source-side select gate line are charged to a third voltage, which is higher than said ground potential and is equal to or lower than said second voltage.
申请公布号 US8300466(B2) 申请公布日期 2012.10.30
申请号 US201113037965 申请日期 2011.03.01
申请人 MAEJIMA HIROSHI;ISOBE KATSUAKI;KABUSHIKI KAISHA TOSHIBA 发明人 MAEJIMA HIROSHI;ISOBE KATSUAKI
分类号 G11C11/34 主分类号 G11C11/34
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