发明名称 |
Apparatus and method for performing a screening test of semiconductor integrated circuits |
摘要 |
An apparatus for performing a screening test of a semiconductor integrated circuit is disclosed, the semiconductor integrated circuit comprising a plurality of processors each having an output signal for instruction execution information, and the processors being programmatically operable. The apparatus for performing a screening test of a semiconductor integrated circuit comprises: an instruction/data signal synchronization circuit for synchronizing the supplying of instructions to said respective processors and for synchronizing the supplying of data to said respective processors; and a trace comparison circuit for comparing instruction execution information that are output from the respective processors to determine whether or not any of said processors has output different instruction execution information. |
申请公布号 |
US8301936(B2) |
申请公布日期 |
2012.10.30 |
申请号 |
US20070447524 |
申请日期 |
2007.10.17 |
申请人 |
INOUE HIROAKI;TAKAGI MASAMICHI;MIZUNO MASAYUKI;NEC CORPORATION |
发明人 |
INOUE HIROAKI;TAKAGI MASAMICHI;MIZUNO MASAYUKI |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|