发明名称 Capping of copper interconnect lines in integrated circuit devices
摘要 A method for capping lines includes forming a metal film layer on a copper line by a selective deposition process, the copper line disposed in a dielectric substrate, wherein the depositing also results in the deposition of stray metal material on the surface of the dielectric substrate, and etching with an isotropic etching process to remove a portion of the metal film layer and the stray metal material on the surface of the dielectric substrate, wherein the metal film layer is deposited at an initial thickness sufficient to leave a metal film layer cap remaining on the copper line following the removal of the stray metal material.
申请公布号 US8298948(B2) 申请公布日期 2012.10.30
申请号 US20090613551 申请日期 2009.11.06
申请人 BONILLA GRISELDA;CHANDA KAUSHIK;FILIPPI RONALD G.;GRUNOW STEPHAN;RATH DAVID L.;SANKARAN SUJATHA;SIMON ANDREW H.;STANDAERT THEODORUS EDUARDUS;YANG CHIH-CHAO;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BONILLA GRISELDA;CHANDA KAUSHIK;FILIPPI RONALD G.;GRUNOW STEPHAN;RATH DAVID L.;SANKARAN SUJATHA;SIMON ANDREW H.;STANDAERT THEODORUS EDUARDUS;YANG CHIH-CHAO
分类号 H01L21/44;H01L21/302 主分类号 H01L21/44
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