| 摘要 |
A pipelined recycling analog-to-digital converter (ADC), which converts a first analog input signal into a first digital output signal, including a first conversion stage and a second conversion stage is disclosed. The first conversion stage includes a first processing unit and a second processing unit. The first and the second processing units execute a number of conversion operations. For each conversion operation, an analog value and a digital code are generated by the first or the second processing unit. The first and the second processing units share an operational amplifier, and for each conversion operation. The second conversion stage includes a comparing unit which determines a specific analog value among the analog values generated by the first and the second processing units. When the specific analog value is not located within a predetermined range, the comparing unit generates a reset pulse to reset the operational amplifier. |
