发明名称 INTERNAL POWER SOURCE VOLTAGE GENERATING CIRCUIT OF SEMICONDUCTOR MEMORY AND METHOD FOR GENERATING INTERNAL POWER SOURCE VOLTAGE
摘要 An internal power source voltage generating circuit of a semiconductor memory and a corresponding method shorten an access delay upon transition of a data reading operation in an address period shorter than a prescribed minimum period to an operation in the prescribed minimum period. While a boosted voltage of an external power source voltage is supplied to the semiconductor memory as the internal power source voltage via an output line connected to one end of a condenser. A reference low potential is applied to the other end of the condenser and the external power source voltage is applied to the output line, thereby charging the condenser. If the internal power source voltage is lower than a threshold voltage, the internal power source voltage on the output line is boosted by applying the external power source voltage to the other end of the condenser.
申请公布号 US2012269022(A1) 申请公布日期 2012.10.25
申请号 US201213444893 申请日期 2012.04.12
申请人 LAPIS SEMICONDUCTOR CO., LTD. 发明人 HIROTA AKIHIRO
分类号 G11C5/14 主分类号 G11C5/14
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