发明名称 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To embed a wiring material well in a via hole formed in an inter-layer insulating film of low hardness and in that of high hardness respectively when forming Cu wiring in the inter-layer insulating film by using a dual damascene method. <P>SOLUTION: In a second inter-layer insulating film 17, a wiring groove 30a and a via hole 28a are formed. In an opening part of the via hole 28a, the second inter-layer insulating film 17 is recessed downward diagonally to form a recess 31 having a tapered cross-sectional shape. Consequently, the diameter of the opening part of the via hole 28a becomes larger than that of a region below the opening part. As a result, even if the diameter of the via hole 28a is minute, a wiring material can be embedded well in the via hole 28a. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012209287(A) 申请公布日期 2012.10.25
申请号 JP20110071346 申请日期 2011.03.29
申请人 RENESAS ELECTRONICS CORP 发明人 TOMITA KAZURO
分类号 H01L23/522;H01L21/768 主分类号 H01L23/522
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