发明名称 Cache memory with dynamic lockstep support
摘要 <p>Cache storage may be partitioned in a manner that dedicates a first portion (e.g. 81) of the cache to lockstep mode execution, while providing a second (or remaining) portion (e.g. 82) for non-lockstep execution mode(s). For example, in embodiments that employ cache storage organized as a set associative cache, partition may be achieved by reserving a subset of the ways in the cache for use when operating in lockstep mode. Some or all of the remaining ways are available for use when operating in non-lockstep execution mode(s). In some embodiments, a subset of the cache sets, rather than cache ways, may be reserved in a like manner, though for concreteness, much of the description that follows emphasizes way-partitioned embodiments.</p>
申请公布号 EP2515238(A1) 申请公布日期 2012.10.24
申请号 EP20120164037 申请日期 2012.04.13
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 MOYER, WILLIAM C.
分类号 G06F12/08;G06F11/16;G06F12/12 主分类号 G06F12/08
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