发明名称
摘要 In a multilayered printed wiring board according to one embodiment, a contact area (a side surface of lower electrode through-hole 41b) between lower electrode 41 of thin-film capacitor 40 and lower via-hole conductor 45 is larger compared to a multilayered printed wiring board having a via-hole conductor abutting against the bottom surface of a lower electrode. And the thickness of lower electrode 41 is greater than that of build up conductive layers 32 of build-up part 30. In addition, in lower via-hole conductor 45, the generatrices of insulation layer through-hole 26b and lower electrode through-hole 41b form an angle at junction J. As a result, it is significantly difficult to disconnect lower via-hole conductor 45 and lower electrode 41 after heat-cycle test, thus preventing defects caused by heat-cycle test.
申请公布号 JP5058812(B2) 申请公布日期 2012.10.24
申请号 JP20070540223 申请日期 2006.10.16
申请人 发明人
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
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