发明名称 |
Rectilinear covering method with bounded number of rectangles for designing a VLSI chip |
摘要 |
A method for creating a rectilinear non-convex polygonal output representative of a component used to build a VLSI circuit chip from a plurality of points corresponding to a plurality of components of the chip includes: covering the plurality of points with a set of rectangles; creating a Voronoi diagram for the set of rectangles; forming a nearest neighbor tree for the Voronoi diagram; connecting a selected set of the rectangles corresponding to the nearest neighbor tree into a non-convex rectilinear polygon; and applying the non-convex rectilinear polygon to build the VLSI chip. |
申请公布号 |
US8296702(B2) |
申请公布日期 |
2012.10.23 |
申请号 |
US20100686412 |
申请日期 |
2010.01.13 |
申请人 |
MUKHERJEE MAHARAJ;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MUKHERJEE MAHARAJ |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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