发明名称 |
Integrated circuit comprising error correction logic, and a method of error correction |
摘要 |
An integrated circuit comprises forward error correction (FEC) decoder logic being coupled to memory and arranged to receive data, comprising application data, from a host application process. The FEC decoder logic performs error detection upon the received data. Logic is further arranged to transmit error free application data back to the host application process prior to performing error correction; and store in memory only application data in which errors are detected. |
申请公布号 |
US8296621(B2) |
申请公布日期 |
2012.10.23 |
申请号 |
US20070593514 |
申请日期 |
2007.04.04 |
申请人 |
VILLION MATHIEU;FREESCALE SEMICONDUCTOR, INC. |
发明人 |
VILLION MATHIEU |
分类号 |
H03M13/00 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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