| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory system having improved reliability. <P>SOLUTION: A memory system 1 in an embodiment includes: a non-volatile memory 2 having a plurality of blocks; a cache 3; a logical/physical address conversion table which shows correspondence between a logical address designated by a host 7 and a physical address designating a data position on the non-volatile memory; and an erasure frequency table which holds an erasure frequency of each of blocks having logical addresses in the logical/physical address conversion table. In the memory system, a controller 6 is provided which, in response to notification of a logical address as a deletion object from the host, acquires the erasure frequency of a deletion object block including a deletion object region designated by a physical address corresponding to the logical address, in the logical/physical address conversion table and, and if a scarcely erased block having an erasure frequency equal to or lower than a prescribed percentage of the acquired erasure frequency is found by the erasure frequency table, reads effective data in the scarcely erased block into the cache 3 and writes the effective data to the deletion object region to invalidate the effective data in the scarcely erased block. <P>COPYRIGHT: (C)2013,JPO&INPIT |
