发明名称 Double-Step CORDIC Processing for Conventional Signed Arithmetic With Decision Postponing
摘要 A double-step CORDIC algorithm is implemented for conventional signed arithmetic using multiple iteration stages in which at least one stage implements decision postponing, in which the decision for each stage is delayed until the next stage. In one implementation, the decision for the previous stage is implemented in parallel with the execution of CORDIC equation functions for the current stage. Implementing the double-step CORDIC with decision postponing algorithm can increase the speed of the CORDIC function compared to prior-art CORDIC implementations.
申请公布号 US2012265796(A1) 申请公布日期 2012.10.18
申请号 US201113085616 申请日期 2011.04.13
申请人 LSI CORPORATION 发明人 VONTELA SIVA SWAROOP;PRABHU VIDYA;KUNDU PRIYABRATA
分类号 G06F17/11;G06F7/548 主分类号 G06F17/11
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