| 摘要 |
An image processing apparatus includes a memory control circuit that stores pixel data in a frame memory, an image processing circuit that processes the pixel data stored in the frame memory, and an output circuit that outputs processed pixel data. The memory control circuit divides the pixel data into upper bit portions and lower bit portions, and a lower bit processing circuit stores the lower bit portions in the frame memory by one of (i) dividing lower bit portion of each of the pixel data into n unit portions and storing corresponding one of n unit portions in the frame memory during each of n successive frame periods, and (ii) dividing pixels constituting each of the frames into n groups and storing the lower bit portions of the pixel data of pixels in corresponding one of n groups in the frame memory during each of n successive frame periods.
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