| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a capacitor structure which adapts to standard/low temperature processing technologies and has suitability for chemical mechanical polishing (CMP) used for a multilayer structure improving the density of a capacitance. <P>SOLUTION: A capacitor structure is formed in an opening 101 of a dielectric layer of an integrated circuit. A lower electrode layer 102 extends to at least a part of a side surface of the opening 101, but does not extend to an upper surface of the dielectric layer 405. The dielectric material layer 405 is disposed on the lower electrode 102 and an upper surface of the integrated circuit dielectric layer 203. Finally, an upper electrode layer 406 is formed on the dielectric material layer 405. An overlapped area between the upper electrode layer 406 and the lower electrode layer 102 does not exist. This structure avoid short circuits that may occur during planarization processes. <P>COPYRIGHT: (C)2013,JPO&INPIT |
