发明名称 |
SRAM CELL WITH ASYMMETRICAL PASS GATE |
摘要 |
A method of controlling gate induced drain leakage current of a transistor is disclosed. The method includes forming a dielectric region (516) on a surface of a substrate having a first concentration of a first conductivity type (P-well). A gate region (500) having a length and a width is formed on the dielectric region. Source (512) and drain (504) regions having a second conductivity type (N+) are formed in the substrate on opposite sides of the gate region. A first impurity region (508) having the first conductivity type (P+) is formed adjacent the source. The first impurity region has a second concentration greater than the first concentration. |
申请公布号 |
US2012261768(A1) |
申请公布日期 |
2012.10.18 |
申请号 |
US201213478839 |
申请日期 |
2012.05.23 |
申请人 |
HOUSTON THEODORE W.;YANG SHYH-HORNG;SADRA KAYVAN;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
HOUSTON THEODORE W.;YANG SHYH-HORNG;SADRA KAYVAN |
分类号 |
H01L27/11 |
主分类号 |
H01L27/11 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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