发明名称 Triple well transmit-receive switch transistor
摘要 A transistor arrangement including a triple well structure, the triple well structure including a substrate of a first conductivity type, a first well region of a second conductivity type formed within the substrate and a second well region of the first conductivity type being separated from the substrate by the first well region. The transistor arrangement further includes a first transistor formed on or in the second well region, the first transistor including a body terminal being connected to the second well region and a second well region switch being connected to the body terminal of the first transistor.
申请公布号 US8288829(B2) 申请公布日期 2012.10.16
申请号 US20090442519 申请日期 2009.03.23
申请人 ZHANG YUE PING;LI QIANG;NANYANG TECHNOLOGICAL UNIVERSITY 发明人 ZHANG YUE PING;LI QIANG
分类号 H01L29/76 主分类号 H01L29/76
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