发明名称 Digital demodulating apparatus for timing error detection
摘要 The invention discloses a digital demodulating apparatus for timing error detection, including a numerically controlled oscillator, an equalizer unit, a decoder and a timing error detector. The numerically controlled oscillator generates a first sequence signal according to an input sequence signal and a timing error sequence signal. The equalizer unit equalizes the first sequence signal to generate an equalized sequence signal. The decoder decodes the equalized sequence signal to generate to generate an output sequence signal. The timing error detector generates the timing error sequence signal according to the first sequence signal and one of the equalized sequence signal and the output sequence signal.
申请公布号 US8290092(B2) 申请公布日期 2012.10.16
申请号 US20090469029 申请日期 2009.05.20
申请人 TSAI CHIN-JUNG;JIANG JENG-SHIANN;HIMAX MEDIA SOLUTIONS, INC. 发明人 TSAI CHIN-JUNG;JIANG JENG-SHIANN
分类号 H04L27/00 主分类号 H04L27/00
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