发明名称 METHODE DE TEST POUR DISPOSITIFS ELECTRONIQUES INTEGRES A SEMI-CONDUCTEUR ET ARCHITECTURE DE TEST CORRESPONDANTE
摘要 <p>A testing method is described of at least one device provided with an integrated testing circuit and in communication with at least one tester where messages/instructions/test signals/information are exclusively sent from the tester to the device. A testing architecture is also described for implementing this testing method.</p>
申请公布号 FR2965645(B1) 申请公布日期 2012.10.12
申请号 FR20100058043 申请日期 2010.10.05
申请人 STMICROELECTRONICS (GRENOBLE 2) SAS;STMICROELECTRONICS S.R.L. 发明人 PAGANI ALBERTO;BARD JEAN-MICHEL
分类号 G06F11/36;G06F15/76;H01L21/66 主分类号 G06F11/36
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