发明名称 DELAY DETECTOR CIRCUIT AND RECEIVER APPARATUS
摘要 The present invention provides a delay detector circuit that delivers performance at low cost and can reduce power consumption, and a receiver apparatus that uses this delay detector circuit. The delay detector circuit according to the present invention performs a part of the decoding processing for decoding data transmitted by a transmitter apparatus based on a received wave. The receiver apparatus according to the present invention uses the delay detector circuit described above. Therefore the delay detector circuit and receiver apparatus of the present invention deliver performance at low cost and can reduce power consumption.
申请公布号 KR20120112836(A) 申请公布日期 2012.10.11
申请号 KR20127022514 申请日期 2010.07.06
申请人 PANASONIC CORPORATION 发明人 UMEDA NAOKI;MAEDA MITURU
分类号 H04L27/227 主分类号 H04L27/227
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