发明名称 POWER-UP SIGNAL GENERATION CIRCUIT
摘要 A power-up signal generation circuit includes: a first section signal generation unit configured to sense a level of an external voltage and a level of an internal voltage and generate a first section signal; a second section signal generation unit configured to output a second section signal by buffering the first section signal when the internal voltage is lowered to below a minimum level; and a selective output unit configured to output the first section signal as a power-up signal, wherein the selective output unit outputs the second section signal as the power-up signal when a power-up section is ended and a mode register setting operation is performed.
申请公布号 US2012256662(A1) 申请公布日期 2012.10.11
申请号 US201113191548 申请日期 2011.07.27
申请人 CHO YONG DEOK;HYNIX SEMICONDUCTOR INC. 发明人 CHO YONG DEOK
分类号 H03L7/00 主分类号 H03L7/00
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