发明名称 REPAIR METHOD AND INTEGRATED CIRCUIT USING THE SAME
摘要 An integrated circuit includes: a memory controller configured to determine whether a memory cell included in a semiconductor memory device is defective or not and extract a fail address having positional information of the defective memory cell, in a test mode; and a fail address storage unit configured to store the fail address.
申请公布号 US2012257462(A1) 申请公布日期 2012.10.11
申请号 US201113336906 申请日期 2011.12.23
申请人 CHO YONG DEOK;HYNIX SEMICONDUCTOR INC. 发明人 CHO YONG DEOK
分类号 G11C29/04;G11C7/00 主分类号 G11C29/04
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