Processor trace circuit, which shares a bus with the processor being monitored

摘要

A device 100 has a data processor 102, a debug circuit 108 and a bus interface 107. The debug circuit generates trace data relating to the actions of the data processor. The bus interface is used to communicate with the processor and to transfer the trace data to a host debugger 120 over an external bus 112. The debug circuit and the processor appear as separate devices on the bus and can transfer data on the bus independently. The bus uses a protocol, such as USB, where data interchange is controlled by a single system on the bus. The processor may be held in a reset state, when not connected to the bus. A USB hub 114 may connect the debug circuit and the processor to the bus.