DYNAMIC POWER MANAGEMENT OF CACHE MEMORY IN A MULTI-CORE PROCESSING SYSTEM

摘要

A system and method of power scaling cache memory (110) of a multi-core processing system includes a plurality of core processors (100), a cache memory (110) and a controller (125). The cache memory (110) includes partitioned cache (120) and shared cache (115). The shared cache (115) can be partitioned into the partitioned cache (120). Each core processor (100) is communicatively coupled to at least one corresponding partitioned cache (120) and the shared cache (100). The controller (125) is communicatively coupled to each of the core processors (100), to the partitioned cache (120), and to the shared cache (115). The controller (125) is configured to cause the at least one corresponding partitioned cache (120) to power down in response to the corresponding core processor (100) powering down. The controller (125) can also be configured to flush the cache lines of the partitioned cache (125) prior to powering down the partitioned cache (125) in response to the corresponding processor (100) powering down.