PROCESSOR AND INSTRUCTION PROCESSING METHOD THEREOF

摘要

Provided are a processor and a processor instruction processing method, with which it is possible to accelerate instruction execution speeds. A processor (1) comprises: a BTAC (12) wherein are stored branch destination information of a branch instruction, and boundary information which denotes that the branch instruction is on a fetch line boundary; a branch predict unit (13) which queries the BTAC (12) and carries out a branch prediction of a variable-length instruction set which includes the branch instruction; and a fetch unit (14) which fetches an instruction based on the result of the branch prediction. The branch predict unit (13) queries the BTAC (12), and if the boundary information is present in the instruction which the branch predict unit (13) makes the fetch unit (14) fetch, the branch predict unit (13) makes the fetch unit (14) fetch the branch predict destination after also contiguously fetching the next fetch line, according to the branch destination information.