发明名称 MEMORY DEVICE AND HOST DEVICE
摘要 A controller has a random write mode and a sequential write mode to which it transitions when receiving a start command. The controller in the sequential write mode identifies a data stream partially formed by a data item through a control command or a logical address. It also prepares free unit areas for respective data streams, and writes data items in successive storage areas in a corresponding unit area in an order identical to addresses of the data items. When the controller receives an end command, it performs end processing on a unit area for a corresponding data stream. The controller in the sequential write mode transitions to the random write mode when completing the end processing to all data streams or detects a random write request.
申请公布号 US2012254524(A1) 申请公布日期 2012.10.04
申请号 US201213524835 申请日期 2012.06.15
申请人 FUJIMOTO AKIHISA 发明人 FUJIMOTO AKIHISA
分类号 G06F12/00 主分类号 G06F12/00
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