摘要 |
In order to make a non-linear conversion unit which is more compact, one aspect of this invention comprises an encryption processing unit which divides configuration bits of data which is to undergo data processing into a plurality of lines and then inputs the same, and then repeatedly executes a data conversion process, in which a round function is applied, to the data of each line; the encryption processing unit comprises an F function execution unit which inputs data of one line forming a plurality of lines and generates conversion data; the F function execution unit comprises a non-linear conversion processing unit which executes non-linear conversion processing; and the non-linear conversion processing unit has a repeating structure of one NAND or NOR operation unit, a non-linear operation unit formed from one XOR or XNOR operation unit, and a bit conversion unit. Due to this repeating structure a more compact non-linear conversion unit can be realised. |
申请人 |
SONY CORPORATION;SHIBUTANI, KYOJI;AKISHITA, TORU;ISOBE, TAKANORI;SHIRAI, TAIZO;HIWATARI, HARUNAGA;MITSUDA, ATSUSHI |
发明人 |
SHIBUTANI, KYOJI;AKISHITA, TORU;ISOBE, TAKANORI;SHIRAI, TAIZO;HIWATARI, HARUNAGA;MITSUDA, ATSUSHI |