| 摘要 |
This disclosure provides sense amplifier technology for a memory device that uses multiple sense methods. In one implementation, a memory device is configured with both digital sense circuitry and analog sense circuitry, which can be alternatively or simultaneously used. In another implementation, use of the specific sense circuitry is dependent upon a mode or command. In another embodiment, the specific sense circuitry utilizes is responsive to predetermined tasks. In one contemplated application, a multilevel nonvolatile memory device (e.g., a flash memory device) uses (a) digital sense circuitry during program-verify operations, where it is desired to minimize power and maximize bitline impact and where latency is already to a certain extent fixed by programming operation and (b) analog sense circuitry in responding to read commands, to provide relatively high performance (at the expense of greater power consumption). Different sets of circuits can be used or circuitry can be shared and/or configured for multisense operation, depending on the specific design. |
