发明名称 SYSTEM ARCHITECTURE AND METHOD FOR COMMUNICATION BETWEEN DEVICES OVER BACKPLANE TO REDUCE INTERFACE COUNT
摘要 The present disclosure discloses a system architecture and method for reducing pin count on a backplane connecting a plurality of devices. In an embodiment, the signals from the plurality of devices are multiplexed or mapped into time slots using a MapMux device. The MapMux device then sends the multiplexed or mapped signals over backplane on TDM bus. The MapMux device at the receiving end de-multiplexes or de-maps and sends the received signals to plurality of devices for further processing. The present disclosure allows a large number of signals to be passed between the devices through a single stream.
申请公布号 WO2012131447(A1) 申请公布日期 2012.10.04
申请号 WO2011IB53039 申请日期 2011.07.08
申请人 TEJAS NETWORKS LIMITED;RAO, SRINIVAS;RANKA, GAJENDRA SINGH 发明人 RAO, SRINIVAS;RANKA, GAJENDRA SINGH
分类号 G06F13/36 主分类号 G06F13/36
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