发明名称 Reconfigurable input/output in hierarchical memory link
摘要 A memory system and memory module includes a plurality of memory devices, each having a plurality, e.g. four, ports for transmitting and receiving command signals, write data signals and read data signals. One of the memory devices is connected to a host or controller, and the remaining memories are connected together, typically by point-to-point links. When the memory system configuration is such that at least one of the ports in at least one of the memory devices is not used, one or more other ports can use the pins that may otherwise have been used by the unused ports. As a result, a set of reconfigurable, shared pins is defined in which two ports share the pins. The port that is not being used in a particular application for the memory device is not connected to the shared pins, and another port that is being used in the application is connected to the shared pins. This allows for the used of fewer package pins and, consequently, reduced package size.
申请公布号 US8279652(B2) 申请公布日期 2012.10.02
申请号 US20100708049 申请日期 2010.02.18
申请人 CHOI JOO-SUN;SAMSUNG ELECTRONICS CO., LTD. 发明人 CHOI JOO-SUN
分类号 G11C5/06 主分类号 G11C5/06
代理机构 代理人
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