发明名称 Spacer double patterning for lithography operations
摘要 Systems and methods of semiconductor device fabrication and layout generation are disclosed. An exemplary method includes processes of depositing a layer of a first material and patterning the layer to form an initial pattern, wherein the initial pattern defines critical features of the layout elements using a single exposure; depositing spacer material over the first pattern on the substrate and etching the spacer material such that the spacer material is removed from horizontal surfaces of the substrate and the first pattern but remains adjacent to vertical surfaces of the first pattern; removing the initial pattern from the substrate while leaving the spacer material in a spacer pattern; filling the spacer pattern with final material; and trimming the tilled pattern to remove portions of the final material beyond dimensions of the layout elements.
申请公布号 US8278156(B2) 申请公布日期 2012.10.02
申请号 US20100889133 申请日期 2010.09.23
申请人 PIERRAT CHRISTOPHE;CADENCE DESIGN SYSTEMS, INC. 发明人 PIERRAT CHRISTOPHE
分类号 H01L21/335 主分类号 H01L21/335
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