发明名称 Clock generation for integrated radio frequency receivers
摘要 Systems of clock generation for integrated radio frequency receiver. In an integrated radio frequency receiver, a mixer is often used to down convert the incoming radio frequency signal. The down converted signal is then digitized and digital signal processing circuitry is used for efficient and flexible implementation of various functions to receive the underlying audio and/or data information. The mixer requires clock generation circuitry to provide a proper local oscillator signal for a selected channel. On the other hand, the digital signal processing circuitry requires its separate digital clock for proper operations. The clock generation system utilizes single local oscillator generation circuitry to provide the local oscillator signals required by the mixer and the digital clock signals required by the digital signal processing circuitry. In order to maintain a fixed frequency for the digital clock signal regardless channel selection, a fractional divider coupled with sigma-delta circuitry is used to derive the digital clock signal.
申请公布号 US8280340(B2) 申请公布日期 2012.10.02
申请号 US20090551569 申请日期 2009.09.01
申请人 XUAN PEIQI;ZHANG YIFENG;LI XUECHU;QUINTIC HOLDINGS 发明人 XUAN PEIQI;ZHANG YIFENG;LI XUECHU
分类号 H04B1/28 主分类号 H04B1/28
代理机构 代理人
主权项
地址
您可能感兴趣的专利